| 摘要 |
<p>A semiconductor device with a vertical transistor and method of manufacturing the same is provided to improve electrical characteristic of cell operation by reducing the resistance of bit line buried in a SOI substrate. A semiconductor device with a vertical transistor includes A SOI substrate(106), a gate area(120), a drain area(122), a source region(124), and a bit line(130). A laminated silicon substrate, a buried oxide film(102) and silicon layer(104) is laminated on the SOI substrate. The SOI substrate has a bulb type groove on the silicon layer, and the gate is arranged on the side wall of the bulb type groove. The drain region is arranged in the silicon layer between the buried oxide film and the gate.</p> |
