| 摘要 |
A low contact resistance CMOS integrated circuit [50] and method for its fabrication are provided. The CMOS integrated circuit [50] comprises a first transition metal [102] electrically coupled to the N-type circuit regions [72, 74] and a second transition metal [98] different than the first transition metal electrically coupled to the P-type circuit regions [76, 78]. A conductive barrier layer [104] overlies each of the first transition metal and the second transition metal and a plug metal [110] overlies the conductive barrier layer. |
