发明名称
摘要 <p>A pixel cell array architecture having a dual conversion gain. A dual conversion gain element is coupled between a floating diffusion region and a respective storage capacitor. The dual conversion gain element having a control gate switches in the capacitance of the capacitor to change the conversion gain of the floating diffusion region from a first conversion gain to a second conversion gain. In order to increase the efficient use of space, the dual conversion gain element gate also functions as the bottom plate of the capacitor. In one particular embodiment of the invention, a high dynamic range transistor is used in conjunction with a pixel cell having a capacitor-DCG gate combination; in another embodiment, adjacent pixels share pixel components, including the capacitor-DCG combination.</p>
申请公布号 JP2009503896(A) 申请公布日期 2009.01.29
申请号 JP20080525030 申请日期 2006.07.26
申请人 发明人
分类号 H01L27/146;H04N5/335 主分类号 H01L27/146
代理机构 代理人
主权项
地址
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