| 摘要 |
PROBLEM TO BE SOLVED: To optimize selection of a technology library, in such cases as when including a plurality of clock areas inside one module and when including another module inside one module. SOLUTION: A logic synthesizer has: an input part 10 to input circuit description data related to a circuit function and a restriction condition in logic synthesis; a path selection part 21 for selecting a path included in the module by use of a result obtained by analyzing the circuit description data; a recognition part 22 for recognizing a start point and an end point in the selected path, and for recognizing the clock areas to which they respectively belong; and a technology library setting part 23 for performing initial setting of the technology library according to the clock areas to which the start point and the end point respectively belong, for setting one of the technology libraries as the start point based on priority order between the technology library set in the preceding path with the start point as the end point and the technology library initially set at the start point, and for setting one of the technology libraries as the end point based on priority order between the technology library set in the succeeding path with the end point as the start point and the technology library initially set at the end point. COPYRIGHT: (C)2009,JPO&INPIT
|
