| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a package capable of obtaining sufficient coplanarity in a through electrode even if cavities are provided in the package for electronic components having the through electrode. <P>SOLUTION: The package comprises: a silicon substrate 10a having a through hole TH; a package substrate section 11 composed of an insulation layer 14 formed at the sides of both surfaces of the silicon substrate 10a and on the inner surface of the through hole TH, and the through electrode 18 filled into the through hole TH; and a frame section 23 that is erected at the peripheral section of the package substrate section 11 and composes a cavity C on the silicon substrate 10a. The upper surface of the through electrode 18 in the cavity C is set equally high as the insulation layer 14 for planarization. After the through electrode 18 is planarized, the frame section 23 is joined to the package substrate section 11 by low-temperature junction utilizing plasma treatment. <P>COPYRIGHT: (C)2009,JPO&INPIT |
