摘要 |
<p>In one embodiment, an HSDPA co-processor for 3GPP Release 6 Category 8 (7.2 Mb/s) HSDPA that provides all chip-rate, symbol-rate, physical-channel, and transport-channel processing for HSDPA in 90 nm CMOS. The co-processor design is scalable to all HSDPA data rates up to 14 Mb/s. The coprocessor implements an Advanced Receiver based on an NLMS equalizer, supports RX diversity and TX diversity, and provides up to 6.4 dB better performance than a typical single-antenna rake receiver. Thus, 3GPP R6 HSDPA functionality can be added to a legacy R99 modem using an HSDPA co-processor consistent with embodiments of the present invention, at a reasonable incremental cost and power.</p> |
申请人 |
AGERE SYSTEMS INC. |
发明人 |
BANNA, RAMI;BICKERSTAFF, MARK ANDREW;COOKE, MATTHEW EMMETT;KIND, ADRIEL PAUL;LI, YI-CHEN;RIDLER, OLIVER;SONTOWSKI, UWE;THOMAS, CHARLES NICHOLAS ALEXANDER;UNG, LONG;VAN DEN BELD, KOEN;WIDDUP, BENJAMIN JOHN;WOODWARD, GRAEME KENNETH;YIP, DOMINIC WING-KING;ZHOU, GONGYU |