METHOD AND APPARATUS FOR CREATING A GATE OPTIMIZATION EVALUATION LIBRARY
摘要
<p>The invention can provide a method of processing a substrate using Gate-Optimization processing sequences and evaluation libraries that can include gate-etch procedures, COR-etch procedures, and evaluation procedures</p>
申请公布号
WO2008157156(A1)
申请公布日期
2008.12.24
申请号
WO2008US66494
申请日期
2008.06.11
申请人
TOKYO ELECTRON LIMITED;YAMASHITA, ASAO;FUNK, MERRITT;PRAGER, DANIEL;CHEN, LEE;SUNDARARAJAN, RADHA
