发明名称 CASH CONTROL DEVICE AND CASH CONTROL METHOD
摘要 <p>To certainly improve a process efficiency when a pipeline process to a plurality of threads is performed. To solve this problem, each process unit from a cycle T process unit (142a) to a cycle R process unit (142d) sets a valid bit of a stalled thread to "1" in the corresponding weight ports (143a to 143d) when the process is performed with respect to the request of the stalled thread. When it is detected that the valid bit is "1" with respect to any thread, a request storage unit (148) outputs the request corresponding to this valid bit to a register unit (149) in series. A priority decision unit (144) decides an output priority in a selector (141) according to the valid bit. The selector (141) outputs any one of the requests according to the select signal from the priority decision unit (144).</p>
申请公布号 WO2008155826(A1) 申请公布日期 2008.12.24
申请号 WO2007JP62339 申请日期 2007.06.19
申请人 FUJITSU LIMITED;SHIRAHIGE, YUJI 发明人 SHIRAHIGE, YUJI
分类号 G06F12/08 主分类号 G06F12/08
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