| 摘要 |
PROBLEM TO BE SOLVED: To avoid a malfunction caused by an IR drop when scan-testing a semiconductor integrated circuit, and to provide an efficient scan test. SOLUTION: This test pattern generator 10 for generating a test pattern for scan-testing the semiconductor integrated circuit is provided with a risky portion extracting part 110, and an ATPG 150 of a pattern generation executing part for executing the generation of the test pattern. The risky portion extracting part 110 extracts a risky portion with a risk of generating the malfunction in the test caused by the IR drop of an electric power source, from the semiconductor integrated circuit, and the ATPG 150 generates the test pattern to restrain an operation rate of an instance included in the risky portion, in the risky portion extracted by the risky portion extracting part 110. COPYRIGHT: (C)2008,JPO&INPIT
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