DOPED WGE TO FORM DUAL METAL GATES

摘要

A method (200) of fabricating a dual metal gate structures in a semiconductor device, the method comprising forming a gate dielectric layer (204) above a semiconductor body, forming a work function adjusting layer (206) on the dielectric gate layer in the PMOS region, depositing a tungsten germanium gate electrode layer (208) above the work function adjusting material in the PMOS region, depositing a tungsten germanium gate electrode layer above the gate dielectric in the NMOS region annealing (210) the semiconductor device, depositing a metal nitride barrier layer (212) on the tungsten germanium layer, depositing a polysilicon layer (214) over the metal nitride, patterning the poly silicon layer, the metal nitride layer, the tungsten germanium layer, work function adjusting layer and the gate dielectric layer to form a gate structure, and forming a source/drain (222) on opposite sides of the gate structure.