发明名称 VOLTAGE CONTROLLED OSCILLATOR AND VOLTAGE CONTROLLED DELAY LINE
摘要 A voltage controlled oscillator and a voltage controlled delay circuit are provided to delay and output an input signal as much as a predetermined time determined by a control signal although a power voltage is changed. A voltage controlled delay circuit includes a compensation current adding unit(420), a first bias voltage generation unit(430), an N-MOS transistor(N2), and a P-MOS transistor(P4). The compensation current adding unit outputs a compensation current generated by adding a current for compensating a voltage change to a control current. The first bias voltage generation unit receives the compensation current, forms a current mirror with an N-MOS transistor for a pull down, and provides a first bias voltage to a gate of the N-MOS transistor for the pull down. The N-MOS transistor forms a current mirror with the first bias voltage generation unit, and drives the compensation current. The P-MOS transistor forms a current mirror with the P-MOS transistor with a pull up, and provides a second bias voltage corresponding to a current, which is inputted through a terminal coupled to a drain of the N-MOS transistor, to a gate of the P-MOS transistor for the pull up.
申请公布号 KR20080086008(A) 申请公布日期 2008.09.25
申请号 KR20070027542 申请日期 2007.03.21
申请人 ADTECHNOLOGY, LTD. 发明人 LEE, HYUN SEOK;HONG, DONG HEE;PARK, JONG WOOK;KIM, JUN SUK
分类号 H03L7/099;H03L7/187 主分类号 H03L7/099
代理机构 代理人
主权项
地址