发明名称 Method and circuit for bus activity detection and system recovery
摘要 A universal bus activity fault detection and resetting circuit comprises means for determining the data period of the bus; means for determining a time constant for fault detection on the basis of said data period; and detecting means for detecting a condition of activity or non activity on said bus, said detecting means generating a reset output on the basis of said time constant and said non activity condition.
申请公布号 EP1967951(A2) 申请公布日期 2008.09.10
申请号 EP20080101530 申请日期 2008.02.12
申请人 VESTEL ELEKTRONIK SANAYI VE TICARET A.S. 发明人 CETIN, HUSEYIN ERTURK
分类号 G06F11/07 主分类号 G06F11/07
代理机构 代理人
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