| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a clock generator for outputting two clock signals with signal waveforms inverted at the mutually same timing. <P>SOLUTION: The clock signal generator 10 includes first, second, and third D flip-flops 101-103, and includes a first output terminal for outputting input signals to a first D input terminal and a first inverted output terminal for inverting and outputting the input signals to the first D input terminal and inputting output to the first D input terminal. The second D flip-flop includes a second D input terminal for inputting the output from the first output terminal of the first D flip-flop and a second output terminal for outputting the input signals to the second D input terminal as first output. The third D flip-flop includes a third D input terminal for inputting the output from the first inverted output terminal of the first D flip-flop and a third output terminal for outputting the input signals to the third D input terminal as second output. The first output and the second output have the signal waveforms inverted at the mutually same timing. <P>COPYRIGHT: (C)2008,JPO&INPIT |
