RF POWER AMPLIFIER EMPLOYING BIAS CIRCUIT TOPOLOGIES FOR MINIMIZATION OF RF AMPLIFIER MEMORY EFFECTS

摘要

An RF power amplifier (10) having reduced memory effects is disclosed. This is achieved by a novel design of the DC supply feed network (26) to achieve low impedance across video frequencies, whilst maintaining the correct RF output matching. One or more transmission zeros are provided in the bias circuit transfer function, which are positioned in the video bandwidth so as to provide low and relatively constant impedance across the video bandwidth. Also, a parallel Dc feed line (68, 69) may be employed to reduce impedance across the video bandwidth. The reduction in memory effects allows improved performance of predistortion linearization techniques and an implementation in a feed forward amplifier (110) employing predistortion linearization is also disclosed.