| 摘要 |
PURPOSE: The output power source voltage stabilization circuit easily can stabilize the output power source voltage in the EDS circuit by reducing the resistance value from the capacity value increment in the power-up completion. CONSTITUTION: In the ESD circuit(10), capacitor and resistance is connected for the electrostatic discharge protection to the gate node of the MOS transistor. It is operationally connected to the gate node and it increases the capacity value and the capacity value increment(20) reduces the resistance value. In transistor, the drain source channel is connected between the gate node and resistance.
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