| 摘要 |
<p>1,226,580. Voltage multipliers. NIHON DENSHI K.K., and NISSIN ELECTRIC CO. Ltd. 24 April, 1968 [26 April, 1967], No. 19509/68. Heading H2F. To reduce ripple, due to stray capacitance, on the D.C. output of a voltage multiplier of the Cockroft Walton type, the multiplier is arranged as shown in Fig. 1, wherein there are two outer columns of capacitors connected to A.C. sources and two inner columns of capacitors from which Direct voltage outputs (e.g. to an electron accelerator) are obtained. Transformers 11, 14 secondaries apply anti-phase voltages E Sin #t and -E sin #t respectively to column terminals 17, 18. Voltages in the sequence -E, -3E, -5E &c. are available at the connection points in the D.C. columns. In order to inhibit ripple induction, it is desirable that stray capacities are symmetrical with respect to the output circuit and that the two alternating voltages are equal and in antiphase. Thus ripples produced by the two a, c, columns cancel each other out prior to entering the output stage. This balance is achieved by adjustment of R 12 and L 13 thereby adjusting the magnitude and phase of the voltage at terminal 17 or alternatively R 15 and L 16 may be adjusted. Instead of the variable inductors, variable capacitors may be used, or the transformers may be variable. Fig. 2 not shown illustrates diagrammatically a suitable structural arrangement of the multiplier components. Alternatively, the multiplier may be full-wave type.</p> |
