发明名称 ERZEUGEN EINER LOKALEN UND GLOBALEN VERDRAHTUNG FÜR EIN HALBLEITERPRODUKT
摘要 Methods of forming different back-end-of-line (BEOL) wiring for different circuits on the same semiconductor product, i.e., wafer or chip, are disclosed. In one embodiment, the method includes simultaneously generating BEOL wiring over a first circuit using a dual damascene structure in a first dielectric layer, and BEOL wiring over a second circuit using a single damascene via structure in the first dielectric layer. Then, simultaneously generating BEOL wiring over the first circuit using a dual damascene structure in a second dielectric layer, and BEOL wiring over the second circuit using a single damascene line wire structure in the second dielectric layer. The single damascene via structure has a width approximately twice that of a via portion of the dual damascene structures and the single damascene line wire structure has a width approximately twice that of a line wire portion of the dual damascene structures. A semiconductor product having different width BEOL wiring for different circuits is also disclosed.
申请公布号 DE602006013303(D1) 申请公布日期 2010.05.12
申请号 DE20066013303T 申请日期 2006.05.19
申请人 INTERNATIONAL BUSINESS MACHINES CORP. 发明人 GRECO, STEPHEN E.;STANDAERT, THEODORUS E.
分类号 H01L21/4763;H01L23/528 主分类号 H01L21/4763
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