| 摘要 |
A semiconductor device (300) suitable for use as a storage cell includes a semiconductor body (302) having a top surface and a bottom surface, a top gate dielectric (145) overlying the semiconductor body top surface (302), an electrically conductive top gate electrode (161) overlying the top gate dielectric (145), a bottom gate dielectric (106) underlying the semiconductor body (302) bottom surface, an electrically conductive bottom gate electrode (108) underlying the bottom gate dielectric (106), and a charge trapping layer (104). The charge trapping layer (104) includes a plurality of shallow charge traps (104), adjacent the top or bottom surface of the semiconductor body. The charge trapping layer (104) may be of aluminum oxide, silicon nitride, or silicon nanoclusters. The charge trapping layer (104) may located positioned between the bottom gate dielectric (106) and the bottom surface of the semiconductor body (302).
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