发明名称 Memory control apparatus and method
摘要 A memory control apparatus generates a plurality of commands whose unit of transfer is smaller than the unit of data transfer of a memory access request, and when the memory access request are transmitted from a plurality of request sources, issues the plurality of commands to a memory in alternate order for each request are executed by time division and concurrently.
申请公布号 US7716387(B2) 申请公布日期 2010.05.11
申请号 US20060485285 申请日期 2006.07.13
申请人 CANON KABUSHIKI KAISHA 发明人 MINAMI TOSHIAKI
分类号 G06F12/00 主分类号 G06F12/00
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