发明名称 System and method for path compression optimization in a pipelined hardware bitmapped multi-bit trie algorithmic network search engine
摘要 For use in a pipeline network search engine of a router, a path compression optimization system and method is disclosed for eliminating single entry trie tables. The system embeds in a parent trie table (1) path compression patterns that comprise common prefix bits of a data packet and (2) skip counts that indicate the length of the path compression patterns. The network search engine utilizes the path compression patterns and the skip counts to eliminate single entry trie tables from a data structure. Each path compression pattern is processed one stride at a time in subsequent pipeline stages of the network search engine. The elimination of unnecessary single entry trie tables reduces memory space, power consumption, and the number of memory accesses that are necessary to traverse the data structure.
申请公布号 US7715392(B2) 申请公布日期 2010.05.11
申请号 US20020317338 申请日期 2002.12.12
申请人 STMICROELECTRONICS, INC. 发明人 HUANG LUN BIN;RICHARDSON NICHOLAS JULIAN;RAJGOPAL SURESH
分类号 H04L12/56 主分类号 H04L12/56
代理机构 代理人
主权项
地址