发明名称 Method and apparatus for optimizing a gate channel
摘要 The invention can provide a method of processing a substrate using Gate-Optimization processing sequences and evaluation libraries that can include gate-etch procedures, COR-etch procedures, and evaluation procedures.
申请公布号 US7713758(B2) 申请公布日期 2010.05.11
申请号 US20070762258 申请日期 2007.06.13
申请人 TOKYO ELECTON LIMITED 发明人 YAMASHITA ASAO;FUNK MERRITT;PRAGER DANIEL;CHEN LEE;SUNDARARAJAN RADHA
分类号 H01L21/00 主分类号 H01L21/00
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