| 发明名称 |
Method and system for improving signal integrity in integrated circuit designs |
| 摘要 |
A method and system of improving signal integrity in integrated circuit designs is disclosed. In some embodiments, signal integrity optimization is conducted in conjunction with detailed routing of an integrated circuit design based upon a global routing plan previously generated for the design.
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| 申请公布号 |
US7716621(B1) |
申请公布日期 |
2010.05.11 |
| 申请号 |
US20050129766 |
申请日期 |
2005.05.13 |
| 申请人 |
CADENCE DESIGN SYSTEMS, INC. |
发明人 |
LI YING-MENG;CHANG CHIH-WEI;CHAO LOUIS;YAO SO ZEN |
| 分类号 |
G06F17/50 |
主分类号 |
G06F17/50 |
| 代理机构 |
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