发明名称 Instruction encoding for system register bit set and clear
摘要 An instruction encoding architecture is provided for a microprocessor to allow atomic modification of privileged architecture registers. The instructions include an opcode that designates the instructions are to be executed in privileged (kernel) state only, and are to communicate with privileged control registers. The instructions designate which of a plurality of privileged architecture registers is to be modified, which bit fields within the designated privileged architecture register is to be modified, and whether the designated bit fields are to be set or cleared. An instruction atomically sets or clears bit fields within privileged architecture registers, without reading the privileged architecture registers into a general purpose register. In addition, the instruction encoding allows a programmer to specify whether the previous content of a privileged architecture register is to be saved to a general purpose register during the atomic modification.
申请公布号 US7600100(B2) 申请公布日期 2009.10.06
申请号 US20060567290 申请日期 2006.12.06
申请人 MIPS TECHNOLOGIES, INC. 发明人 JENSEN MICHAEL GOTTLIEB
分类号 G06F9/00;G06F13/24 主分类号 G06F9/00
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