发明名称 Ultra fine pitch I/O design for microchips
摘要 A microchip includes at least one I/O area surrounding at least one core circuit area. The I/O area further includes a first I/O cell having at least one first post-driver device connected to a first I/O pad; a second I/O cell having at least one second post-driver device connected to a second I/O pad; and an electrostatic discharge (ESD) cluster shared by the first I/O cell and the second I/O cell for protecting the same against ESD current during an ESD event, thereby reducing a total width of the first I/O cell and the second I/O cell.
申请公布号 US7594198(B2) 申请公布日期 2009.09.22
申请号 US20070711949 申请日期 2007.02.27
申请人 TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD. 发明人 CHEN KER-MIN
分类号 G06F17/50 主分类号 G06F17/50
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