发明名称 |
Handling fatal computer hardware errors |
摘要 |
Methods and apparatus are disclosed for handling fatal computer hardware errors on a computer that include halting data processing operations of the computer upon occurrence of a fatal hardware error; signaling by a source chip of a chipset to the programmable logic device the occurrence of a fatal hardware error; signaling by the programmable logic device to an embedded system microcontroller the occurrence of a fatal hardware error; reading by the embedded system microcontroller through at least one sideband bus from registers in chips of the chipset information regarding the cause of the fatal hardware error; and storing by the embedded system microcontroller the information in non-volatile random access memory of the embedded system microcontroller.
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申请公布号 |
US7594144(B2) |
申请公布日期 |
2009.09.22 |
申请号 |
US20060464364 |
申请日期 |
2006.08.14 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
BRANDYBERRY MARK A.;DASARI SHIVA R.;HURLIMANN DANIEL E.;WILKIE BRUCE J.;WILSON LEE H.;WOOD CHRISTOPHER L. |
分类号 |
G06F11/00 |
主分类号 |
G06F11/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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