发明名称 Embedding device in substrate cavity
摘要 An embodiment of the present invention is a technique to reduce interconnect length between devices. A cavity is formed in a substrate having a substrate surface. The cavity has a depth. A first device having a device surface and a thickness is placed into the cavity. The thickness matches the depth such that the device surface is approximately planar with the substrate surface. The first device is attached to a second device via bumps on the second device.
申请公布号 US7592202(B2) 申请公布日期 2009.09.22
申请号 US20060395021 申请日期 2006.03.31
申请人 INTEL CORPORATION 发明人 TOYAMA MUNEHIRO;GURUMURTHY CHARAN;KOHMURA TOSHIMI
分类号 H01L21/00 主分类号 H01L21/00
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