发明名称 Capacitance process using passivation film scheme
摘要 In accordance with the objectives of the invention a new method and structure is provided for the creation of a capacitor. A contact pad and a lower capacitor plate have been provided over a substrate. Under the first embodiment of the invention, a layer of etch stop material, serving as the capacitor dielectric is deposited after which a triple layer of passivation is created over a substrate. The compound passivation layer is first etched, using a fuse mask, to define and expose the capacitor dielectric and a fuse area after which the passivation layer is second etched to define and expose the contact pad. A layer of AlCu is then deposited, patterned and etched to create a capacitor upper plate and a contact interconnect over the contact pad. Under a second embodiment of the invention, a triple layer of passivation is created over a layer of etch stop material deposited over a substrate, a contact pad and a lower capacitor plate have been provided over the substrate. The compound passivation layer is first etched to expose the lower capacitor plate. A layer of capacitor dielectric is deposited after which the passivation layer is second etched to expose the contact pad. A layer of AlCu is then deposited, patterned and etched to create an AlCu interconnect over the contact pad and a upper capacitor plate.
申请公布号 US7592220(B2) 申请公布日期 2009.09.22
申请号 US20060634580 申请日期 2006.12.06
申请人 TAIWAN SEMICONDUCTOR MANUFACTURING CO. LTD. 发明人 LIN CHUAN CHANG;CHIU JAMES
分类号 H01L21/8242;H01L21/02;H01L21/20;H01L21/31;H01L21/44;H01L21/469;H01L21/8234;H01L21/8244;H01L23/522;H01L23/525 主分类号 H01L21/8242
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