发明名称 Analog-to-digital converter and method of gain error calibration thereof
摘要 The invention provides an analog-to-digital converter (ADC). The ADC comprises a plurality of stages connected in series, a gain error correction module, and a look-ahead module. Each of the stages derives a stage output value from a stage input signal and generates a stage output signal as the stage input signal of a subsequent stage, wherein one of the stages is selected as a target stage for estimating a gain value thereof. The gain error correction module delivers a correction number to the target stage to affect the stage output signal of the target stage and the stage output values of subsequent stages of the target stage, receives at least one auxiliary output value from a look-ahead module dedicated to the target stage, and derives an error estimate of the gain value of the target stage from the stage output values and the auxiliary output value. The look-ahead module generates the auxiliary output value according to the stage output value of the target stage, wherein the auxiliary output value is not affected by the correction number.
申请公布号 US7592938(B2) 申请公布日期 2009.09.22
申请号 US20080132202 申请日期 2008.06.03
申请人 MEDIATEK INC. 发明人 HSUEH KANG-WEI;TU YU-HSUAN
分类号 H03M1/06 主分类号 H03M1/06
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