发明名称 BUFFER CONTROLLER AND RECEIVER
摘要 <P>PROBLEM TO BE SOLVED: To provide a buffer controller and receiver for playing back video or audio without using an expensive component such as a VCXO, without performing PWM control or the like, and further without missing data. <P>SOLUTION: The buffer controller includes a nearly flow detection unit 261, a vertical period control unit 262, and a vertical synchronizing signal generation unit 263. The nearly flow detection unit 261 compares the amount of accumulated data in a buffer with a predetermined threshold and detects a comparison result as nearly overflow or as nearly underflow. In accordance with the comparison result of the nearly flow detection unit 261, the vertical period control unit 262 adjusts the length of a vertical synchronizing period. The vertical synchronizing signal generation unit 263 generates a new vertical synchronizing signal from the adjustment result of the vertical period control unit 262. <P>COPYRIGHT: (C)2009,JPO&INPIT
申请公布号 JP2009200938(A) 申请公布日期 2009.09.03
申请号 JP20080041707 申请日期 2008.02.22
申请人 TOSHIBA CORP;TOSHIBA DIGITAL MEDIA ENGINEERING CORP 发明人 INAGAKI YUSHI;TOMIZAWA KENJI;OSAWA SHINICHI;KURIHARA KOICHI
分类号 H04N7/173;H04L29/08;H04N21/433;H04N21/44;H04N21/442 主分类号 H04N7/173
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