| 摘要 |
#CMT# #/CMT# The system has registered memory modules i.e. dual inline memory modules (DIMM) (12a, 12b), where each module has post register-command-/address (CA) buses (22a, 22b) parallely connecting a memory chip with associated registers (16a, 16b). The bus has a termination by terminating resistors (24), which are connected with a potential, where the potential amounts to half of supply voltage of the modules. A memory controller (10) provides component selection signals to the registers, which apply CA signals to associated memory components independent of the selection signals. #CMT#USE : #/CMT# Memory system i.e. multiple slot memory system, for use in slot in a motherboard of personal computer (PC) and server. #CMT#ADVANTAGE : #/CMT# The memory controller provides the component selection signals to the registers of the memory modules, and the registers apply the command-/address signals to the associated memory components independent of the selection signals, thus reducing power loss and increasing system speed. #CMT#DESCRIPTION OF DRAWINGS : #/CMT# The drawing shows a schematic circuit diagram of a multiple slot memory system.'(Drawing includes non-English language text)' 10 : Memory controller 12a, 12b : Dual inline memory modules 16a, 16b : Registers 22a, 22b : Post register-command-/address buses 24 : Terminating resistors. |
