| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a test technique for a semiconductor integrated circuit which eliminates providing an exclusive test terminal and can avoid the situation in which a voltage is applied to a predetermined terminal in order to enter test mode, thereby making it impossible to perform other tests in parallel and requiring longer test time. <P>SOLUTION: The multifunction semiconductor integrated circuit has a plurality of functional blocks (11 to 15) and incorporates a timer circuit (20) into either of the plurality of functional blocks. When a voltage with a level which is not applied in the normal operation condition is applied to external terminals (OV, FB), which are provided corresponding to functional blocks other than the functional block (13) into which the timer circuit is incorporated and to which a voltage with a smaller range than a power supply voltage is applied in the normal operation condition, test mode for testing the timer circuit is set. <P>COPYRIGHT: (C)2009,JPO&INPIT |
