| 摘要 |
PROBLEM TO BE SOLVED: To reduce the contact resistance of a memory cell transistor. SOLUTION: A semiconductor device 70 is provided with a plurality of insulated-gate field-effect transistors on a semiconductor substrate 1. At the bottom part of a self-aligned contact opening part that is formed between the gates of the insulated-gate field-effect transistor and includes the side face isolated from the gates of the insulated-gate field-effect transistor by a sidewall insulating film 8 and an insulating film 9, a polysilicon plug 11 having a recessed shape is provided. A barrier metal film 12 is provided on the polysilicon plug 11. On the barrier metal film 12, a metal plug 13 is buried in such a manner as to cover the self-aligned contact opening part. COPYRIGHT: (C)2009,JPO&INPIT |
