| 摘要 |
Semiconductor wafers are polished between upper and lower polishing plates, the semiconductor wafer being polished on both sides while in a recess of a carrier by supplying a polishing agent. The wafer is double-side polished in a first polishing step, which is concluded with a negative overhang, defined as the difference between the thickness of the wafer and the thickness of the carrier after the first polishing step. The wafer is then double-side polished in a second polishing step, in which less than 1 mum of material is removed from the surfaces of the wafer. Silicon semiconductor wafers having polished front and rear sides with a front side global planarity SBIRmax value of less than 100 nm, and a front side local planarity PSFQR value of 35 nm or less in an edge region, with an edge exclusion of 2 mm, are obtained.
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