发明名称 METHOD OF MANUFACTURING SEMICONDUCTOR APPARATUS
摘要 PROBLEM TO BE SOLVED: To provide a method of manufacturing a semiconductor apparatus capable of cobalt-siliciding the upper section of a gate electrode for a CMOS transistor used for a logic circuit and source/drain regions in an embedded DRAM. SOLUTION: USGs 9 formed on the source/drain regions 7a and 7b in regions excepting at least memory cell regions, the USGs 9 formed on gate electrodes 4 and silicon oxide films 5 are removed. The USGs 9 function as a cobalt-siliciding resistant reaction film. The higher performance of the logic circuits and their higher integration are achieved by forming cobalt-siliciding films 11 on the source/drain regions 7a and 7b for the transistors in logic-circuit regions in regions not coated with the USGs and the upper sections of the gate electrodes 4 by depositing cobalt on the whole surface of a wafer by a sputtering method and conducting a thermal treatment such as a lump annealing. COPYRIGHT: (C)2009,JPO&INPIT
申请公布号 JP2009200517(A) 申请公布日期 2009.09.03
申请号 JP20090109504 申请日期 2009.04.28
申请人 RENESAS TECHNOLOGY CORP 发明人 KUBO SHUNJI;AMOU JUN
分类号 H01L21/8242;H01L27/10;H01L27/108 主分类号 H01L21/8242
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