发明名称 FERROELECTRIC MEMORY DEVICE
摘要 A ferroelectric memory includes ferroelectric capacitors including ferroelectric films between first electrodes and second electrodes; cell transistors; and a bit line contact connecting the cell transistors to a bit line, wherein the first electrode is connected to one of source and drain of the cell transistor at a first node, so that the ferroelectric capacitor and the cell transistor form a unit cell, the other of source and drain of the cell transistor for the unit cell is connected to the first node of other unit cell to serially connect the cell transistors for unit cells, so that the unit cells form a cell string, the word lines are connected to gates of the cell transistors or function as gates, the plate lines are connected to the second electrodes of the ferroelectric capacitors, and the bit line is connected to a cell transistor at an end of the cell string.
申请公布号 US2009219748(A1) 申请公布日期 2009.09.03
申请号 US20090395096 申请日期 2009.02.27
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 SHUTO SUSUMU
分类号 G11C11/22;G11C11/24;G11C11/416 主分类号 G11C11/22
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