发明名称 Level shift circuit
摘要 A feedback circuit by which an output of a memory device for storing level-shifted data can be fed back to the input side includes inverters, resistors, and transistors. The resistance value of combined resistance for pulling up or down first and second switching devices is varied in accordance with the output of the memory device by the feedback circuit, so that malfunction caused by dv/dt noise can be dealt with out generating any through current. In this manner, it is possible to provide a level shift circuit which can deal with malfunction causing dv/dt noise regardless of an on or off state of a high-potential-side switching device, while generation of a through current can be suppressed.
申请公布号 US2011134710(A1) 申请公布日期 2011.06.09
申请号 US20100926500 申请日期 2010.11.23
申请人 FUJI ELECTRIC SYSTEMS CO., LTD. 发明人 AKAHANE MASASHI
分类号 G11C7/00 主分类号 G11C7/00
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