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发明名称
VOLTAGE STABILIZATION FOR CLOCK SIGNAL FREQUENCY LOCKING
摘要
申请公布号
KR20110061588(A)
申请公布日期
2011.06.09
申请号
KR20117007063
申请日期
2009.09.22
申请人
INTEL CORP.
发明人
ALLAREY JOSE;JAHAGIRDAR SANJEEV;HARRERA IVAN
分类号
G06F1/26;G06F1/04
主分类号
G06F1/26
代理机构
代理人
主权项
地址
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