发明名称 |
Gate Dielectric Formation for High-Voltage MOS Devices |
摘要 |
An integrated circuit structure includes a semiconductor substrate and a high-voltage metal-oxide-semiconductor (HVMOS) device, which includes a first high-voltage well (HVW) region of a first conductivity type in the semiconductor substrate; a drain region of a second conductivity type opposite the first conductivity type in the semiconductor substrate and spaced apart from the first HVW region; a gate dielectric with at least a portion directly over the first HVW region; and a gate electrode over the gate dielectric. The gate dielectric includes a bottom gate oxide region; and a silicon nitride region over the bottom gate oxide region.
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申请公布号 |
US2011133276(A1) |
申请公布日期 |
2011.06.09 |
申请号 |
US20100888113 |
申请日期 |
2010.09.22 |
申请人 |
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. |
发明人 |
THEI KONG-BENG;YU JIUN-LEI JERRY;CHOU CHIEN-CHIH;TSAI CHUN-LIN |
分类号 |
H01L29/78;H01L21/336 |
主分类号 |
H01L29/78 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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