Method for manufacturing micro and/or nano chip carrier component, involves arranging chip on carrier, and applying pressure on chip against carrier, so that adhesive layer is formed between chip and carrier

摘要

The method involves partially covering a side (14) of a wafer (16) with an adhesive material (18) i.e. thermoplastic polymer varnish, such that a three-dimensional contact element (10) i.e. stud bump, arranged on the wafer side is partially embedded in the adhesive material. A chip (20) is detached from the wafer, where a chip surface is partially coated with the adhesive material. The chip is arranged on a carrier, where the chip surface is aligned to the carrier. Pressure is applied on the chip against the carrier, so that an adhesive layer is formed between the chip and the carrier. An independent claim is also included for a chip carrier component comprising a conductive surface.