| 摘要 |
In a controller of a disk array device, when recovery from a power failure is detected, the controller instructs a reading section to transfer data in a burst mode using a large prefetch amount. When an error is detected, the controller causes the data to be transferred again for an area where the error is detected. Further, the controller designates different access ports for the reading section and an erasing section, and causes these sections to operate in parallel. The reading section reads cache data from a flash memory and stores the cache data in a cache memory. The erasing section uses the access port different from the access port of the reading section, to erase data that is stored in the flash memory and has been transferred by the reading section. |
