发明名称 METHOD FOR MANUFACTURING LAMINATION TYPE SEMICONDUCTOR INTEGRATED DEVICE
摘要 Provided is a method for manufacturing a lamination type semiconductor integrated device that can simultaneously attain grinding force resistance during back side grinding of a semiconductor wafer, heat resistance during anisotropic dry etching and the like, chemical resistance during plating and etching, smooth debonding of a support substrate for processing at the end, and low adherend staining; the method comprises at least a step of back side grinding of a first semiconductor wafer having a device formed on its surface and a step of laminating by electrical bonding the first semiconductor wafer with a second semiconductor wafer having a device formed on its surface, wherein, at the time of back side grinding of the first semiconductor wafer, back of the first semiconductor wafer is ground after surface of formed device on the first semiconductor wafer is bonded to a support substrate for processing by using a pressure-sensitive silicone adhesive.
申请公布号 US2011136321(A1) 申请公布日期 2011.06.09
申请号 US20100950308 申请日期 2010.11.19
申请人 SHIN-ETSU CHEMICAL CO., LTD. 发明人 KURODA YASUYOSHI;KONDO KAZUNORI;KATO HIDETO
分类号 H01L21/762 主分类号 H01L21/762
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