发明名称 GAAS LOGICAL INTEGRATED CIRCUIT
摘要 PURPOSE:To attain low power consumption by providing a GaAs diode and a discharge circuit between the 1st GaAs FET and an input terminal in addition to the 1st GaAs FET of normally open type being a driver and the 2nd GaAs FET of normally close type being a load. CONSTITUTION:The GaAs FET51 of normally open type becomes a driver to an inverter circuit and the GaAs FET52 of normally close type constitutes a load. Further, a GaAs diode 53 is connected between a gate of the FET51 and a signal input terminal in the polarity with forward bias when an input signal VIN is at a high level. Further, when the input signal VIN connected between the gate of the GaAs FET51 and the signal input terminal is at a low level, the stored charge of the gate of the GaAs FET51 is discharged by the GaAs diode for discharge.
申请公布号 JPS59231920(A) 申请公布日期 1984.12.26
申请号 JP19830105919 申请日期 1983.06.15
申请人 KOGYO GIJUTSUIN (JAPAN) 发明人 IGAWA YASUO;HOUJIYOU AKIMICHI
分类号 H03K19/0952;H03K19/017;H03K19/0944;H03K19/0956;(IPC1-7):H03K19/094 主分类号 H03K19/0952
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