发明名称
摘要 <p><P>PROBLEM TO BE SOLVED: To provide a delay circuit capable of reducing the deformation of a duty factor of an output signal after passing through a delay line independently of the number of stages of delay cells of the delay line. <P>SOLUTION: The delay circuit includes: an edge detection circuit that detects a leading edge and a trailing edge of an input signal and outputs a detection signal with a prescribed pulse width on the basis of the edges; the delay line for delaying the detection signal by a prescribed time to provide an output of a delayed signal; and a signal recovery circuit that provides an output of an output signal with a frequency and a duty factor nearly equal to those of the input signal on the basis of only the leading edge or the trailing edge of the delayed signal and delayed from the input signal by the delay time of the delay line. <P>COPYRIGHT: (C)2006,JPO&NCIPI</p>
申请公布号 JP4695415(B2) 申请公布日期 2011.06.08
申请号 JP20050073041 申请日期 2005.03.15
申请人 发明人
分类号 H03K5/135;G06F1/06;H03K5/05 主分类号 H03K5/135
代理机构 代理人
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