| 摘要 |
<P>PROBLEM TO BE SOLVED: To simplify a circuit structure and to simultaneously perform high speed phase synchronization. <P>SOLUTION: A B/U conversion part 1 generates an RZ unipolar signal of positive side waveform and an RZ unipolar signal of negative side waveform of a bipolar signal and an OR circuit 2 converts two columns of RZ unipolar signals into one column of an RZ unipolar signal. A flip-flop 3 inputs one column of RZ unipolar signal to a clock terminal, inputs an "H" level to a data terminal and extracts a signal of 64kHz component of the bipolar signal. A counter 5 is validated by the signal of 64kHz component extracted by the flip-flop and counts clocks at 512kHz or more. A reset pulse generation circuit 6 outputs a reset pulse when the count reaches the predetermined frequency. <P>COPYRIGHT: (C)2007,JPO&INPIT |
