| 摘要 |
Disclosed is a circuit for converting an analog input signal (100) into a digital code (b 1 -b N ), comprising a delay circuit (230) adapted to generate a periodical signal (CLK) having a delay as a function of the analog input signal value; and a quantization stage (205) for converting the delayed periodical signal (232) into the digital code. The circuit converts an analog voltage or current into the time-domain, thus facilitating the implementation of high-speed analog-to-digital converters into submicron technologies, in particular CMOS technologies. A method of converting an analog input signal (100) into a digital code (b1-b N ) is also disclosed.
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