Fanout-optimization during physical synthesis for placed circuit designs

摘要

A method of implementing a circuit design for a target device can include assigning load pins of a high fanout signal of a placed circuit design into a plurality of windows according to a location of each load pin on the target device. A source of the high fanout signal can be replicated, wherein each window is associated with a source of the high fanout signal. For each source of the high fanout signal, the source can be connected to load pins of the window associated with the source and the source can be placed within the window associated with the source. The placed circuit design can be output.