发明名称 |
Methods and devices for leakage current reduction |
摘要 |
Methods and devices for leakage current reduction are described. A regulator transistor is connected to a switch to bias the transistor with a first voltage during an ON state and a second voltage during the OFF state of the transistor. The switchable bias allows leakage current decrease and “on” resistance increase of the transistor.
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申请公布号 |
US2010308919(A1) |
申请公布日期 |
2010.12.09 |
申请号 |
US20100799910 |
申请日期 |
2010.05.03 |
申请人 |
ADAMSKI JAROSLAW;LOSSER DANIEL;SHARMA VIKAS |
发明人 |
ADAMSKI JAROSLAW;LOSSER DANIEL;SHARMA VIKAS |
分类号 |
H03F1/34;H03F3/04;H03K3/01 |
主分类号 |
H03F1/34 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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