发明名称 TIMING ADJUSTMENT CIRCUIT
摘要 <p><P>PROBLEM TO BE SOLVED: To provide a timing adjustment circuit for adequately adjusting the timing of a clock signal according to an environmental change. <P>SOLUTION: The timing adjustment circuit includes: an environmental sensor for detecting an environmental value; a clock delay circuit for delaying the clock signal which is supplied to a circuit to be supplied with a clock; and a control unit for sequentially setting a plurality of different delay amounts to the clock delay circuit when the change of the environmental value satisfies a predetermined condition, determining whether each of the delay amounts is adequate from the operating state of the circuit to be supplied with the clock in each delay amount, and determining an optimal delay amount to a current environmental value on a result of the adequateness determination to set it in the clock delay circuit. <P>COPYRIGHT: (C)2011,JPO&INPIT</p>
申请公布号 JP2011090621(A) 申请公布日期 2011.05.06
申请号 JP20090245465 申请日期 2009.10.26
申请人 KYOCERA CORP 发明人 UEHARA TORU
分类号 G06F12/00;G06F1/06;G06F12/16 主分类号 G06F12/00
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