Memory device using a common write word line and a common read bit line

摘要

A one read/two write SRAM circuit of which memory cell size is small, and high-speed operation is possible. The SRAM circuit includes first and second flip-flop circuits which are connected in parallel to a common write word line; a first write control circuit which is connected to said first flip-flop circuit, is conducted by a write control signal supplied to said write word line, and supplies a first write signal to said first flip-flop circuit; and a second write control circuit which is connected to said second flip-flop circuit, is conducted by a write control signal supplied to said write word line, and supplies a second write signal to said second flip-flop circuit.