发明名称 Method and system for performing Viterbi decoding using a reduced trellis memory
摘要 A method for performing Viterbi decoding using a reduced trellis memory is provided that includes dividing a block of data into a plurality of segments. A feed-forward process is performed on each of the segments to generate a trellis for each of the segments. A traceback process is performed on each of a plurality of overlapping segment pairs, each segment pair comprising a first segment and a second segment, to generate a traceback result for the first segment and a traceback result for the second segment. The traceback result for the second segment is discarded to generate a decoder output based on the traceback result for the first segment.
申请公布号 US7979781(B2) 申请公布日期 2011.07.12
申请号 US20070708195 申请日期 2007.02.20
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 PISEK ERAN
分类号 H03M13/00 主分类号 H03M13/00
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